This section is intended to provide information relevant to understanding various technologies described herein. As the section's title implies, this is a discussion of related art that should in no way imply that it is prior art. Generally, related art may or may not be considered prior art. It should therefore be understood that any statement in this section should be read in this light, and not as any admission of prior art.
FIG. 1 illustrates a block diagram of a system 100 having a conventional memory compiler 108 as known in the art. The memory compiler 108 is a software suite bundled with circuit design and data. The memory compiler 108 is utilized to generate memory instance models 156 and their electronic digital automation (EDA) views (e.g., liberty models) for a given corner, which is defined by process, voltage, temperature, metal-stack, VT mode, etc.
To generate an EDA view for a given corner of a given instance, the user inputs a memory instance (e.g., bits, words, mux values, etc.) and corner configuration 114 (e.g., process, voltage, temperature, etc.) into the memory compiler 108. The memory compiler 108 accesses one or more corner databases 150 for the given corner and retrieves the data needed to generate the memory instance model 156 and the EDA view. The memory model generator 154 uses the retrieved data to generate the memory instance model 156 and the EDA view in a defined format.
The one or more corner databases 150 may be shipped to the user with the memory compiler 100. Traditionally, if the user desires to generate a new corner, the new corner is typically generated by a memory compiler vendor and then shipped to the user. Unfortunately, the conventional memory compiler 108 does not have capability or flexibility to allow the user to generate the new corner for themselves.